General VLSI - Very Large Scale Integration MCQs

1. An active current mirror means that ...

2. Floating point data types provide an approximation of .... .

3. For an npn Bipolar Transistor, gm ... .

4. Contacts between the metal layers are known as _____________.

5. How many Pass transistors can be connected in a series?

6. A signal data object in VHDL is an object with ....

7. For a given total bias current, the gain of a differential pair is________ more than the CS Stage.

8. A fast CMOS circuit requires that the gm ... (Where gm means transconductance).

9. High Electron Mobility Transistors(HEMT) are formed using alternating layers of .... .

10. For the Orbit Process, the n-active and p-active regions have_________.

11. What is Metallization in IC Fabrication?

12. The separation between the Thinox Regions is of __________ .

13. If length (L) and width (W) are both scaled down by α, the area is scaled .... . (Power Speed Product PT)

14. What exactly is Behavioral Modeling in VHDL?

15. Latch up introduces_________.

16. Generic Array Logic(GAL) based on?

17. The Double Metal MOS process is used to ____________.

18. In general, VDD and VSS are always distributed upon ____________.

19. MOS current sources are used to generate ... .

20. Which execution platform is used for a behaviour-level VHDL?

21. The Cascode structure ___________.

22. Which statement is not correct about an entity in VHDL?

23. Which one is not a mode for ports in VHDL?

24. If length (L) and width (W) are both scaled down by α, the area is scaled down by __________.

25. In the Folded Cascode structure, ....

26. What does the Programmable Logic Array(PLA) consist of?

27. What function does the scalar data type perform in VHDL?

28. Function of the Alias statement?

29. Which is the fastest technology in terms of propagation delay?

30. When is the Boundary Scan Test (BST) used?

31. Which one is not a sequential statement in VHDL?

32. LSI and VLSI devices use .... technology.

33. Which one is a concurrent statement?

34. Photolithography in IC Fabrication is ....

35. In the BiCMOS process, the basic inverter is made by ....

36. QHDL(Hardware Description Language) is used for ... .

37. Under what condition does the Frenkel defect take place?

38. Which condition qualifies for a Latch-up in CMOS circuit condition?

39. If length (L) and width (W) are both scaled down by α, the area is scaled ... ron

40. Stick diagrams are used to .... .

41. Which problem is eliminated by the NMOS superbuffers?

42. In the Cascode structure, the maximum voltage gain is roughly equal to ... .

43. In VHDL, the prefix 'V' stands for ... .

44. What is the body effect on the input impedance of the Common Gate Configuration?

45. Which can act as a dopant for the formation of N-type gallium arsenide material?

46. Which parameter is advantageous in the case of BiCMOS technology?

47. The two metal layers are laid in a way that .... .

48. In which condition is the Case statement used?

49. Which kind of signal is converted into in the common source arrangement of the transistor?

50. MOS in the Common Gate Configuration provides ....

51. Which one is not a CMOS fabrication technique?

52. In comparison with SSI ,VLSI has .... components per chip.

53. Which diode is present in the GaAs MESFET circuit?

54. Which one is not true about packages in VHDL?

55. Which one has the lowest power dissipation?

56. When do Sequential statements appear in a program?

57. The most commonly used model for scaling is .... .

58. Fick's law deal with?

59. Which stage is used in the Cascode configuration?

60. Which one is true about the fabrication of capacitors in the ICs?

61. In VHDL,the order of the concurrent statements must be_________.

62. Wafers with a .... are needed for the fabrication of VLSI.

63. The CMRR (common-mode rejection ratio) of a differential amplifier must be .... .

64. Which statement does not perform any action?

65. We need only .... to make a 2:1 MUX with a pass transistor logic.

66. Why is the fabrication of inductors in ICs not practical?

67. Which IEEE standard is used by VHDL 93 ?

68. The gain of the CG configuration is .... the CS configuration.

69. In which region should MOS be operated as an amplifier?

70. Why is FET used as a buffer amplifier?