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Basic Embedded Systems MCQ

1. Linux normally requires at least a __ CPU containing a memory management unit (MMU)

16-bit

32-bit

64-bit

128-bit

Answer

Correct Answer: 32-bit

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2. Which statements are correct about Small Scale Embedded Systems?

Single 8bit or 16bit Microcontroller

Minimal hardware and software complexity

Low power dissipation on continuous run

None of the above

Answer

Correct Answer: Single 8bit or 16bit Microcontroller
Minimal hardware and software complexity
Low power dissipation on continuous run

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3. The ITM trace packages for read/write accesses contain the following information: (choose all that apply)

data address

data value

program counter

None of the above

Answer

Correct Answer: data address
data value
program counter

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4. _____ trace macrocells generate trace information for hardware trigger (system event tracing) or provide diagnostic information produced by code instrumentation of the application software.

Bus

System

Core

TRACE32

Answer

Correct Answer: System

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5. Which statements are True about Sophisticated Scale Embedded Systems?

Highly hardware and software complexities

Includes components such as PLA, ASIC, FPGA

Constrained by the processing speed available in hardware units

All of the above

Answer

Correct Answer: All of the above

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6. Using a TRACE32, which generated code can be loaded into the control hardware and functionally tested in-situ?

data

debugger

framework

packages

Answer

Correct Answer: debugger

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7. Choose the best statement to describe the role of a watchdog timer?

Allows linear initialization of hardware and peripherals

The watchdog timer writes the log data for debugging

Ensures that your program won't get "stuck" while executing code

Production code should never enable the watchdog

Answer

Correct Answer: Ensures that your program won't get "stuck" while executing code

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8. Choose the statement that best describes sharing code like counters between interrupt and non-interrupt code?

Shared variables should be declared volatile

Shared variables should be declared transient

Shared variables should be constants only

You need to explicitly protect writes to the shared variables in the non-interrupt code

Answer

Correct Answer: You need to explicitly protect writes to the shared variables in the non-interrupt code

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9. Which communication interface is/are required for an Embedded System to interact with external world peripheral/systems?

Serial Communication interfaces RS-232, RS-422, RS-485

Synchronous Serial Communication Interface I2C, JTAG, SPI, SSC and ESSI

Networks Ethernet, Controller Area Network, LIN

None of the above

Answer

Correct Answer: Serial Communication interfaces RS-232, RS-422, RS-485
Synchronous Serial Communication Interface I2C, JTAG, SPI, SSC and ESSI
Networks Ethernet, Controller Area Network, LIN

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10. What is ARM?

ARM refers to advanced RISC Machines

The ARM processor Dominates 80% of the embedded market

Load Store Architecture

Full Descending Stack

All of the above

Answer

Correct Answer: All of the above

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11. Which statement is incorrect about Digital Signal Processor?

DSP is a specialized Microprocessor

It includes the computational capabilities of microprocessor and multiple and accumulate units (MAC)

DSP has a large number of applications such as image processing, audio, video and telecommunication processing systems

DSP is used for signal measurement

Answer

Correct Answer: DSP is used for signal measurement

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12. Choose the best description of "pivot_root" in Embedded System programming?

You use pivot_root with initrd to load a boot process filesystem

You use pivot_root with initramfs to load a boot process filesystem

You use pivot_root with tmpfs to load a boot process filesystem

You use pivot_root rootfs to load a boot process filesystem

Answer

Correct Answer: You use pivot_root with initrd to load a boot process filesystem

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13. The Multi Core Debug System (MCDS) on the emulation devices provides a counter and trigger systems which extend the normal ___ debug resources.

μA

μB

μC

μD

Answer

Correct Answer: μC

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14. Which are select features of the TRACE32 CoreSight tool?

Support for asymmetric multiprocessing (AMP) and symmetric multiprocessing (SMP)

Debugging via JTAG interface and 2-Pin Serial Wire Debug

Support for all types of trace macrocells (ETM, PTM, HTM, ITM, STM, and more)

Support for the CoreSight Cross Trigger Matrix

All of the above

Answer

Correct Answer: All of the above

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15.
If you are developing C code for an early model ARM Cortex processor, your program fails to compile. However if you remove the below statement from the code, it starts working. What is the reason for the compile error?
t = t + 0.01

Your compiler needs an implementation of a soft float library to handle floating point arithmetic

The architecture requires fixed-point arithmetic with floats

You are missing an #include <...h> statement

Needed libraries for static linking are missing

Answer

Correct Answer: Your compiler needs an implementation of a soft float library to handle floating point arithmetic

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16. A manufacturer builds a ____ ‘family’ around a fixed microprocessor core. Different family members are created by using the same core, including with it different combinations of peripherals and different memory sizes.

system

microchip

microprocessor

microcontroller

Answer

Correct Answer: microcontroller

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17. The Field programmable Gate Arrays (FPGAs) can be used to implement ______________.

a software design

a hardware design

both hardware and software designs

neither of the two

Answer

Correct Answer: both hardware and software designs

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18. How would -34H be represented as a signed number in 2s complement in 8051?

Answer

Correct Answer: CC

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19. ARM3 was produced with __________.

a 2KB cache memory

a 4 KB cache memory

an 8 KB cache memory

a 16 KB cache memory

Answer

Correct Answer: a 4 KB cache memory

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20. What number should be loaded into the TH register using mode 2 to get 100μsec delay? (Assume XTAL=11.0592MHz)

40H

2FH

1FH

5CH

Answer

Correct Answer: 5CH

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21. The Atmega 16 micro controller is a __________.

PIC µC

AVR

INTEL

ARM

Answer

Correct Answer: AVR

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22.
How many times is the following loop performed?
MOV R6, #200
BACK: MOV R5, #100
HERE: DJNZ R5, HERE
DJNZ R6, BACK

2000

1000

100

20,000

Answer

Correct Answer: 20,000

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23. Which devices are used in Embedded Systems?

Only microprocessors can be used

Only microcontrollers can be used

Both microprocessors and microcontrollers can be used

Neither can be used

Answer

Correct Answer: Both microprocessors and microcontrollers can be used

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24. Which one of the following files is produced by an 8051 assembler?

microcontroller.asm

microcontroller.obj

microcontroller.hex

microcontroller.Ist

Answer

Correct Answer: microcontroller.obj
microcontroller.Ist

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25.
If the conditions are:
PA= output with handshaking
PB=output with handshaking, unused bit of PC=don't care
What would be the control word for 8255 PPI?

A4H

B4H

D4H

E4H

Answer

Correct Answer: A4H

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26. Which timer of 8051 is used to set the baud rate?

THO

TLO

TLI

THI

Answer

Correct Answer: THI

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27. The PIC 16F84 micro controller is __________.

a 40-Pin IC

a 28-Pin IC

a 34-Pin IC

an 18-Pin IC

Answer

Correct Answer: an 18-Pin IC

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28. What exactly is Moore's Law about?

The cost of IC

The speed of IC

The power of IC

The integration level components of IC

Answer

Correct Answer: The integration level components of IC

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29. The major difference between Intel 8051 microcontroller and Intel 8031 microcontroller is that the 8031_________.

does not have on-chip RAM

does not have on-chip ROM

does not have on-chip cache

does not have timer in the chip

Answer

Correct Answer: does not have on-chip ROM

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30. The LJMP (long jump) instruction is a ____________________.

1-byte instruction

2-byte instruction

3-byte instruction

4-byte instruction

Answer

Correct Answer: 3-byte instruction

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31. What value must R4 have in the following instruction in order not to jump CJNE R4, #53, OVER?

Answer

Correct Answer: 53

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32. Which of the following companies has designed the AVRs micro controllers?

Philips

Motorola

Atmel

Intel

Answer

Correct Answer: Atmel

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33. With which memory are RAS and CAS associated?

DRAM

SRAM

EPROM

Flash

Answer

Correct Answer: DRAM

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34. The DS5000 microcontroller is called a home development system because it has a___________.

Flash memory

ROM

NV-RAM

Real Time Clock(RTC)

Answer

Correct Answer: Real Time Clock(RTC)

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35. Which version of 8051 is the 8751 microcontroller?

NV-RAM

UV-EPROM

Flash ROM

OTP (one time programmable)

Answer

Correct Answer: UV-EPROM

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36. Which one of the following is not correct?

MOV R5, #F9 H

MOV A, # 0E8H

MOV B, #0D7 H

MOV R0, #0A6 H

Answer

Correct Answer: MOV R5, #F9 H

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37. Which instruction is used to correct the BCD addition problem in 8051?

ADD

ADC

BCD

Answer

Correct Answer: DA

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38. In 8051,the upper limit of the Timer is__________.

FFFFH

1FFFH

7FFFH

2FFFH

Answer

Correct Answer: FFFFH

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39. The JTAG (Joint Test Action Group)is the usual name used for _________________.

IEEE 488 standard

IEEE 1149.1

IEEE 802.1

IEEE 610

Answer

Correct Answer: IEEE 1149.1

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40. What value should be loaded into THI to have a 9600 baud rate, if XTAL=11.0952MHz?

BDH

FDH

EDH

ADH

Answer

Correct Answer: FDH

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41. The ARM architecture is a ___________.

32-bit RISC processor

16-bit RISC processor

32-bit CISC Processor

16-bit CISC Processor

Answer

Correct Answer: 32-bit RISC processor

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42. The bit addressable memory is present in ____________.

Pentium-I processor

8086 microprocessor

AMD processor

8051 microcontroller

Answer

Correct Answer: 8051 microcontroller

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43. In the ATMEL corporation's microcontroller AT89C51, 'C' in the part number indicates__________.

CMOS

Clock

Capacitor

Real-time clock

Answer

Correct Answer: CMOS

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44. After reset in 8051, the ports P0-P3 are initialised to __________________.

OOH

FFH

1FH

2FH

Answer

Correct Answer: FFH

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45. Which bit of the IP register belongs to the serial Interrupt Priority in 8051?

IP.3

IP.2

IP.4

IP.1

Answer

Correct Answer: IP.4

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46. Which register bank conflicts with stack in 8051?

Bank 1

Bank 0

Bank 2

Bank 3

Answer

Correct Answer: Bank 1

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47. What would be the control word for 8255 PPI if all ports are input ports?

ABH

9BH

8BH

7BH

Answer

Correct Answer: 9BH

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48. At which ROM location do we store the first Op-code of an 8051 program?

0FFF H

1FFF H

7FFF H

0000 H

Answer

Correct Answer: 0000 H

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49. What would be the baud rate if TH1= -2, SMOD = 1and XTAL=11.0592MHz in 8051?

27000Hz

26800Hz

27800Hz

28800Hz

Answer

Correct Answer: 28800Hz

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50. The flash memory stores information in an array of __________________.

Floating gate diodes

Floating gate resistors

Floating gate transistors

Pull up transistors

Answer

Correct Answer: Floating gate transistors

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51.
What would be the contents of register A after the following code is executed?
MOV A,#56H
SWAP A
RR A
RR A

50H

51H

59H

53H

Answer

Correct Answer: 59H

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52. When 8051 is powered up, the SP register contains the value of ____________.

00H

02H

08H

07H

Answer

Correct Answer: 07H

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53.
What would be the contents of register A after the execution of the following code?

CLR A
ORL A, #99H
CPL A

66H

99H

77H

88H

Answer

Correct Answer: 66H

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54. Which register bank will be selected if bits 3 and 4 of PSW are 1 & 0 in 8051?

Bank 0

Bank 1

Bank 2

Bank 3

Answer

Correct Answer: Bank 1

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55. What frequency is used by the timer to set the baud rate, if XTAL=11.0592MHz?

28,800 Hz

28,600Hz

28,400Hz

28,200Hz

Answer

Correct Answer: 28,800 Hz

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56. Which of the following is not correct?

RRA

RLA

RRC A

RLC RO

Answer

Correct Answer: RLC RO

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57. The program counter of the PIC16F84 micro controller is of__________.

13-bit

8-bit

12-bit

16-bit

Answer

Correct Answer: 13-bit

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58. Which of the following has the SMOD bit?

SCON

TMOD

PCON

SBUF

Answer

Correct Answer: PCON

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59. Which interrupt will get the highest priority after resetting the system if the interrupt priority is set by the instruction "MOV IP, OCH"?

TFI

INT0

INT1

TFO

Answer

Correct Answer: INT1

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60. How many bytes are used by DATA_2 DB"ENGLAND"?

Answer

Correct Answer: 7

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61.
What would be in register A after the execution of the following code?

MOV A, #85H
SWAP A
ANL A, #OFOH

40H

50H

60H

70H

Answer

Correct Answer: 50H

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62. Which of the following cannot be a sequence in the normal 4-step sequence for a Stepper Motor?

CCH

DDH

99H

33H

Answer

Correct Answer: DDH

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63. Which addressing mode is used by the instruction "Mov A,30 H"?

Direct

Immediate

Indexed

Answer

Correct Answer: Direct

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64. Which of the following signs is used with the Register Indirect Addressing Mode?

[ ]

" "

Answer

Correct Answer: @

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65. Which of the following registers of 8051 is not Bit- Addressable?

PSW

ACC

Answer

Correct Answer: PC

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66. The status of the OV flag for (-2) + (-5) will be_____________.

both 1 and 0

neither 1 nor 0

Answer

Correct Answer: 0

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67. Which of the following classification types are correct of Embedded Systems based on performance and functional requirements?

Sophisticated wrong

Networked

Real Time Data / Hardware

All of the above

Answer

Correct Answer: Sophisticated wrong
Networked

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68. Which statement is True about TLM?

TLM is a high-level modelling approach where details of communication between classes are separated from the information of the implementation of functional units

TLM is a high-level modelling approach where details of communication between modules are separated from the details of the implementation of functional units

TLM is a high-level modelling approach where details of communication between modules are separated from the details of the functional models

TLM is a high-level modelling approach where details of communication between modules are separated from the details of the implementation of class units

Answer

Correct Answer: TLM is a high-level modelling approach where details of communication between modules are separated from the details of the implementation of functional units

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69. Which of the following statements is/are True for Microcontrollers?

Microcontrollers include an integrated CPU, memory and peripherals capable of input and output

Microcontrollers are expensive and less complex

It contains a processor memory and programmable input/output peripherals

None of the above

Answer

Correct Answer: Microcontrollers include an integrated CPU, memory and peripherals capable of input and output
It contains a processor memory and programmable input/output peripherals

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70. The TRACE32 software is an open design so that it works smoothly with all of the common basic components of an ____ design.

software

embedded

event exchange

None of the above

Answer

Correct Answer: embedded

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71. Which programming language is the Mid-level programming counterpart for Assembly programming?

C++

Java

Answer

Correct Answer: C

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72. Which are the designs constraints of Embedded system for Real-Time control system?

Available systems memory

Available processor speed

Cost

All of the above

Answer

Correct Answer: Available systems memory
Available processor speed

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73. Based on performance and functional requirements, Embedded systems are classified as:

Mobile embedded systems

Networked embedded systems

Real time embedded systems

Stand alone embedded systems

All of the above

Answer

Correct Answer: All of the above

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74. What are the following essential units of a processor on an Embedded System?

Execution unit (EU)

Program command(PC)

Program unit (PU)

Program flow control unit (CU)

Answer

Correct Answer: Execution unit (EU)
Program flow control unit (CU)

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75. What are the Statistical Moments in Embedded Systems?

Mean

Variance

Hybrid

Kurto

Skewness

Answer

Correct Answer: Mean
Hybrid

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76. Which events does AOS provide synchronization and communication with in API?

AOS_WaitMessage and AOS_ReceiveMessage

AOS_WaitEvent and AOS_LoadEvent

AOS_EnterMutex and AOS_SignalTask

AOS_WaitSignal and AOS_ExitMutex

AOSWaitSemaphore and AOS_ReleaseSemaphore

Answer

Correct Answer: AOS_WaitMessage and AOS_ReceiveMessage
AOS_WaitEvent and AOS_LoadEvent
AOS_WaitSignal and AOS_ExitMutex

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77. What statements correct regarding Dynamic Memory Allocation in RTOS?

Pools avoid external memory fragmentation, by not permitting a buffer that is returned to the pool to be broken into smaller buffers in the future

Pools memory allocation mechanism allows application software to allocate chunks of memory of 4 to 8 different buffer sizes per pool

When a buffer is returned to the pool, it is put onto a free buffer list of buffers of its own size that are available for future re-use at their original buffer size

All of the above

Answer

Correct Answer: All of the above

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78. Functionalities are done by dedicated HW and SW with _____ resources.

extra

limited

unlimited

infinite

Answer

Correct Answer: limited

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79. C Models abstraction level set is applied to simulation of _____

single cycles

double cycles

multiple cycles

All of the above

Answer

Correct Answer: single cycles

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80. What are dependability requirements of an Embedded System? (choose all that apply)

Maintainability

Interrupt controlled

Critical failure modes

Certification

Direct memory access (DMA)

Answer

Correct Answer: Maintainability
Interrupt controlled
Critical failure modes

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81. The amount of trace data that is _____ via the trace port depends on the target system hardware. The number of cores, the number of trace port pins, and the trace clock speed are all important parameters.

imported

exported

read

loaded

Answer

Correct Answer: exported

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82. A run-time counter tracks the ____ slice for each task, incrementing on every clock tick.

Function

Program

Memory

Time

Answer

Correct Answer: Time

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83. Creating embedded systems requires an iterative process of modeling, ____ , and analysis?

memory

design

boot loader

I/O

Answer

Correct Answer: design

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84. Microcontrollers are a combination of _____ and Memory and other peripherals like RAM, ROM, buffer, I/O ports

COM

I/O

CPU

Motherboard

Answer

Correct Answer: CPU

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85. The main components within a computer or embedded processing engine include the following:

Processor / CPU

Interface

Data bus

All of the above

Answer

Correct Answer: All of the above

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86. IO Subsystems in RTOS generally work in __ IO Operations.

Synchronous

Asynchronous

Isochronous

None of the above

Answer

Correct Answer: Asynchronous

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87. What are aspects of the Hardware Architecture Model?

Pro-active Operations

Effects on Hardware

Topology

Network

Answer

Correct Answer: Effects on Hardware
Topology
Network

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88. Arduino development boards are based on which family of Microcontroller?

PIC

AVR

SDCC

ARM

Answer

Correct Answer: AVR

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89. What are the advantages of "cmake" for cross-compiling to Embedded Systems?

Supported by many IDE's

Detailed Manual

Command line and GUI available

All of the above

Answer

Correct Answer: All of the above

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90. What methods can you use when reading the values of timer?

Read the TL and TH values as float value

Read TL and TH as separate 8-bit value

Read the TL and TH values as 16-bit value

Read the TL and TH values as single bit value

Answer

Correct Answer: Read TL and TH as separate 8-bit value
Read the TL and TH values as 16-bit value

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91. Separating Embedded System functionality into RTOS tasks can serve the following aspects?

OpenEmbedded

Buildroot

Real-time response

Functional partitioning

Answer

Correct Answer: Real-time response
Functional partitioning

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92. The trace information can be recorded by an external tool without any information loss using trace port in __

SoC

RTL

AVG

FPGA

Answer

Correct Answer: SoC

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93. Which statements describe the difference between a timer and a counter?

Timer, Maximum count speed is 1/24 of the oscillator frequency

Counter, Maximum count speed is 1/12 of the oscillator frequency

A counter uses an external signal to count pulses

A timer uses the frequency of the internal clock, and generates delay

Answer

Correct Answer: A counter uses an external signal to count pulses
A timer uses the frequency of the internal clock, and generates delay

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94. In Linux, the bootloader performs _____ initialization.

low-level hardware

Kernel Image

Init process

All of the above

Answer

Correct Answer: low-level hardware

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95. Lauterbach system tool support which modes while recording the trace information generated by the Cortex-M3/M4 processors?

FIFO mode: Storing the information in the 128 MByte memory of the TRACE32 CombiProbe

Real-time Pro ling: The trace information is streamed to the host computer and analyzed during runtime

STREAM mode: Streaming the information to a hard-disk on the host computer

All of the above

Answer

Correct Answer: All of the above

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96. Which methods are used in event counting?

Counting the number of occurrence of that event

Counting the length of the event

Counting the data of the event

None of the above

Answer

Correct Answer: Counting the number of occurrence of that event
Counting the length of the event

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97. Developing software for real-time Embedded Systems involves many activities including the following:

cross-platform testing

debugging

architecture design

multitasking design

All of the above

Answer

Correct Answer: All of the above

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98. A developer can issue commands to debug a running application, including the following activities?

stepping through instructions

accessing system registers

setting/clearing breakpoints

None of the above

Answer

Correct Answer: stepping through instructions
accessing system registers
setting/clearing breakpoints

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99. Choose the correct statement for ARM and AVR Architecture.

AVR is a microprocessor while ARM is a micro-controller

ARM is a microprocessor while AVR is a micro-controller

AVR is 8-Bit architecture while ARM is 32-bit architecture

ARM contains Memory while AVR doesn't

Answer

Correct Answer: ARM is a microprocessor while AVR is a micro-controller

Note: This Question is unanswered, help us to find answer for this one

100. Which statement is correct for advantages in Microcontroller?

Lower cost because many elements of the processor are contained within the one chip resulting in lower chip cost and board cost

Limited performance because the size of memory is limited by what can be accommodated on the chip

MCUs tend to be application specific so the choice may be limited

Less flexibility because all components are integrated into the one chip

Answer

Correct Answer: Lower cost because many elements of the processor are contained within the one chip resulting in lower chip cost and board cost

Note: This Question is unanswered, help us to find answer for this one

101. Select the True statement for Microcontroller disadvantages.

Lower power consumption to be optimised for a given application

Components on a single Chip utilizing microprocessor

MCUs tend to be application specific

Less flexibility because all components are integrated into the one chip

Answer

Correct Answer: Less flexibility because all components are integrated into the one chip

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102. Choose the best description of ‘chroot’ as used for embedded system programming?

If you use a file system inside a chroot you will end-up with a filesystem prefixed by the chrooted path

If a chrooted executable needs access to an object file xx.so then real access will occur to xx.so prefixed by the chrooted path. This allows use of different architecture binaries

The primary purpose of chroot is to provide security

To protect your original your file system when you run binaries of a different architecture

Answer

Correct Answer: If a chrooted executable needs access to an object file xx.so then real access will occur to xx.so prefixed by the chrooted path. This allows use of different architecture binaries

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103. Which architecture is most compatible with Beagle Board hardware?

Intel x86

ARM

AVR

SDCC

Answer

Correct Answer: ARM

Note: This Question is unanswered, help us to find answer for this one

104. What are the interrupts aspects in RESET 8051?

Timer 1 interrupts(TF1)

External HW interrupt 1 (INT10)

Serial COM (RI and TL)

Interrupts

Answer

Correct Answer: Timer 1 interrupts(TF1)
Interrupts

Note: This question has more than 1 correct answers

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105. What are the different Addressing Modes in 8051 microcontroller? (Check multiple if apply)

Immediate Addressing Mode

Directed Addressing Mode

Indexed Addressing Mode

All of the above

Answer

Correct Answer: All of the above

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106. Which of the following is the correct flow for Data Acquisition System?

Physical System > Signal Conditioning > A/D Converters > Transducer Sensor > Computer

Physical System > A/D Converters > Transducer Sensor > Signal Conditioning > Computer

Physical System > Transducer Sensor > Signal Conditioning > A/D Converters > Computer

None of the above

Answer

Correct Answer: Physical System > Transducer Sensor > Signal Conditioning > A/D Converters > Computer

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107. Which of the following factors cause security risks in software:

Connectivity

Extensibility

Complexity

None of the above

Answer

Correct Answer: Connectivity
Extensibility
Complexity

Note: This question has more than 1 correct answers

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108. What are the functional requirements of Embedded System?

Direct Digital Control: Actuators Man-Machine Interaction, informs the operator of the current state of the controlled object, Sensor requirements, Signal conditioning

Data Collection: Sensor requirements, Signal conditioning, Alarm monitoring

Direct Digital Control: Actuators Man-Machine Interaction, informs the operator of the current state of the controlled object, assists the operator in controlling the system

Data Collection: Sensor requirements, assists the operator in controlling the system

B and C

Answer

Correct Answer: Data Collection: Sensor requirements, assists the operator in controlling the system

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109. What are the Classification types of Actuators?

Power Actuator

Part-Turn Actuator

Multi-Turn Actuator

All of the above

Answer

Correct Answer: Part-Turn Actuator
Multi-Turn Actuator

Note: This question has more than 1 correct answers

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110. What are the system level requirements for Embedded Systems?

Power management

End product utility

Controlling physical systems

System safety and reliability

All of the above

Answer

Correct Answer: All of the above

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111. Under Cross-Platform development environment, the target embedded system generally offers:

Dynamic Loader, Link Loader, Monitor, Debug Agent

Function Loader, Link Loader, Monitor, Debug Agent

Dynamic Loader, Link Loader, Program Loader, Debug Agent

All of the above

Answer

Correct Answer: Dynamic Loader, Link Loader, Monitor, Debug Agent

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112. A Microcontroller contains a processor, memory, and programmable I/O peripherals is generally ____ on a chip.

Operating Computer System

Functional Computer System

OS System

None of above

Answer

Correct Answer: Functional Computer System

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113. A SoC is Embedded with the following components?

Multiple standard source solutions

Multiple processors

Memories

Cores

All of the above

Answer

Correct Answer: All of the above

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114. What is the difference between binary semaphore and mutex?

Mutexes are typically used to serialise access of simultaneous users of a shared resource up to a maximum number

Mutexes are typically used to serialise access to a section of re-entrant code that cannot be executed concurrently by more than one process

A semaphore object only allows one process into a controlled section,forcing other processes

A semaphore restricts the number of simultaneous users of a shared resource up to a maximum number

Answer

Correct Answer: Mutexes are typically used to serialise access to a section of re-entrant code that cannot be executed concurrently by more than one process
A semaphore restricts the number of simultaneous users of a shared resource up to a maximum number

Note: This question has more than 1 correct answers

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115. The 16 Series instruction set has which of the following arithmetic instructions?

addwf

addlw

subwf

sublw and incf

All of the above

Answer

Correct Answer: All of the above

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116. Embedded software has the following components?

Program / script

Firmware

All of the above

Answer

Correct Answer: All of the above

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117. Which statement is incorrect about Medium Scale Embedded Systems?

16-bit or 32-bit microcontrollers or Digital signal processors (DSP) or Reduced Instructions Set (RISC) computers

Both hardware and software complexities

No external peripheral complexity

All of the above

Answer

Correct Answer: No external peripheral complexity

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118. When porting the AOS, CAL has the following calls when rewritten?

CAL_ChangeStack: This is the function, where the context switch happens. This is explained in Context Switching section.

CAL_InitializeHardware(): Initializes the hardware, which means initializing the IO, interrupts and timers.

CAL_EnterCriticalRegion(): Enter the critical region by disabling the interrupts.

CAL_ExitCriticalRegion(): Exit the critical region by restoring the CPU flags.

All of the above

Answer

Correct Answer: All of the above

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119. What is the difference between a microprocessor and microcontroller? (choose all that apply)

Microcontrollers have I/O, memory etc. built into it and specifically designed for control

Microcontrollers are managers of the resources (I/O, memory) which lie outside of its architecture

Microprocessors have I/O, memory etc. built into it and specifically designed for control

Microprocessor is a manager of the resources (I/O, memory) which lie out-side of its architecture

Answer

Correct Answer: Microcontrollers have I/O, memory etc. built into it and specifically designed for control
Microprocessor is a manager of the resources (I/O, memory) which lie out-side of its architecture

Note: This question has more than 1 correct answers

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120.
What are the Statistical Moments? (check all that apply)

Mean

Variance

Skewness

Kurto

Skeness -WRONG ANS

Answer

Correct Answer: Kurto

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121.
Which of the following are Classification of Embedded Systems?

Stand-alone Embedded Systems

Real-time Embedded Systems

Networked Web Appliances

Mobile & Web Devices -WRONG ANS

Answer

Correct Answer: Networked Web Appliances

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122.
Design interface definitions with the following levels of abstraction are used?

Message Level

Service Level

Driver Level and Register Trans- fer Level (RTL)

None of the above -WRONG ANS

Answer

Correct Answer: Driver Level and Register Trans- fer Level (RTL)

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123.
Which of the following statement is incorrect about Digital Signal Processor?

DSP as a GPP is a single chip VLSI unit

It includes the computational capabilities if microprocessor and multiply and accumulate units(MAC)

DSP has large number of applications such as image processing, audio, video and telecommunication processing systems

It is used when signal processing functions stop to processed fast and systems close

Answer

Correct Answer: It is used when signal processing functions stop to processed fast and systems close

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124.
Many embedded devices use analog- to-digital-converters (ADCs) for data acquisition. These ADCs may be sampled on a regular timed basis, and the data samples stored by application software in an?

Array

ITM

JTAG

AMP

Answer

Correct Answer: Array

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125.
Which of the following is Classifications of Embedded Systems?

Small Scale Embedded Systems

Medium Scale Embedded Systems

Sophisticated Embedded Systems

Power Scale Embedded Systems -WRONG ANS

Answer

Correct Answer: Sophisticated Embedded Systems

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126.
Different addressing modes in 8051 microcontroller are?

Immediate Addressing

Directed Addressing

None of the above -WRONG ANS

Answer

Correct Answer: Directed Addressing

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127.
The processor _____ must have a trace port with sufcient bandwidth so that the trace information can be recorded by an external tool without any information loss?

SoC

RTL

AVG

FPOG

Answer

Correct Answer: SoC

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128.
UART allows Microcontroller to communicate with? (check all that apply)

Printers

LCDs

Input sensors

None of the above -WRONG ANG

Answer

Correct Answer: Input sensors

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129.
The baseline PIC microcontroller family represents the most direct descendant of the General Instruments ancestors, and displays the core features of the original PIC design. The first Microchip baseline microcontrollers were coded?

1650

1655

16C5X

16C5

Answer

Correct Answer: 16C5X

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130.
Which of the following TRACE32 CoreSight Features?

Support for asymmetric multiprocessing (AMP) and symmetric multiprocessing (SMP)

Debugging via JTAG interface and 2-pin Serial Wire Debug

Support for all types of trace macrocells (ETM, PTM, HTM, ITM, STM, and more)

Support for the CoreSight Cross Trigger Matrix

All of the above

Answer

Correct Answer: All of the above

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131.
Select a True statements for Microcontroller ? (check all that apply)

Microcontrollers include and integrated CPU, memory and peripherals capable of input and output

It contains a processor memory and programmable input/output peripherals

A microcontroller is a functional computer system on a chip

None of the above -WRONG ANS

Answer

Correct Answer: None of the above -WRONG ANS

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132.
Embedding a real μC into simulation environments can be implemented in following different ways, choose correct statements? (check all that apply)

Possibility is to use only a connection via a dedicated communication interface

Solutions connects every μC pin via specialized hardware to the simulation computer

Solutions connects every μC3 pin via specialized hardware to the simulation computer

None of the above -WRONG ANS

Answer

Correct Answer: Solutions connects every μC3 pin via specialized hardware to the simulation computer

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133.
Select True statements for Microprocessor?

To make complete micro computer one must add memory usually ROM and RAM, memory decoder

and oscillator and a number if serial and parallel ports

ITs CPU contains an ALU, a program counter a stack pointer some working register, a clock timing

circuit and interrupt circuit on a single chip WRONG ANS

Answer

Correct Answer: ITs CPU contains an ALU, a program counter a stack pointer some working register, a clock timing

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134.
FPGA based emulators map the SoC design to the configurable logic blocks of an FPGA. FPGAs are a flexible solution as long as the complete design can be mapped to one FPGA?

device

program

microchip

counter

Answer

Correct Answer: device

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135.
The ITM trace packages for read/write accesses contain the following information?

data address

data value

program counter

None of the above

Answer

Correct Answer: data address
data value
program counter

Note: This question has more than 1 correct answers

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136.
The Multi Core Debug System (MCDS) on the emulation devices provides a counter and trigger systems which extends the normal ___ debug resources?

μA

μB

μC

μD

Answer

Correct Answer: μC

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137.
Using a TRACE32, the generated code was loaded into the control hardware and functionally tested in-situ?

data

debugger

framework

packages

Answer

Correct Answer: debugger

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138.
On reset, What happens in an embedded system?

Initialize the stack pointers and prepare memory and bring up parts of the chip

Depends completely on the controller/embedded system you use

Reruns the startup code

restarts with the boot-loader pointing to the reset handler address 0xFFFFFFF0

Answer

Correct Answer: restarts with the boot-loader pointing to the reset handler address 0xFFFFFFF0

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139.
The complete data exchange between the simulation and the μC is realized via the standard debugger interface, so the hardware effort for the coupling is minimal in comparison to other HIL simulation approaches where every ____ pin itself has to be connected to the interface of the simulation computer?

I/O

SoC

HIL

None of the above

Answer

Correct Answer: I/O

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140.
Choose the most probable reason for the compile error. If you are developing code for an early model ARM Cortex processor, your code fails to build and when you remove the line below the code compiles successfully? t = t + 0.01

Your compiler needs an implementation of a soft float library to handle floating point arithmetic

The architecture requires fixed-point arithmetic with floats

You are missing an #include <...h> statement

Needed libraries for static linking are missing

Answer

Correct Answer: Your compiler needs an implementation of a soft float library to handle floating point arithmetic

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141.
To record the trace information generated by the Cortex-M3/M4 processors, Lauterbach supports following modes? (check all that apply)

FIFO mode: Storing the information in the 128 MByte memory of the TRACE32 CombiProbe

STREAM mode: Streaming the information to a hard-disk on the host computer

Real-time Pro ling: The trace information is streamed to the host computer and analyzed during runtime

None of the above -WRONG ANS

Answer

Correct Answer: Real-time Pro ling: The trace information is streamed to the host computer and analyzed during runtime

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142.
The SCE-MI provides a transport infrastructure between the _____ and the host workstation sides of each channel which interconnects transactor models in the emulator to C (untimed or RTL) models on the workstation?

device

emulator

data

ports

Answer

Correct Answer: emulator

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143.
General purpose processor consists of? (check all that apply)

Microprocessor

Microcontroller

Embedded processor

Digital signal power processor -WRONG ANS

Answer

Correct Answer: Embedded processor

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144.
UART is best described as?

An interface

A protocol

A standard

A hardware device

Answer

Correct Answer: A hardware device

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145.
The Instruction set of the PIC I6CXX micro controller family has __________.

76 instructions

150 instructions

35 instructions

65 instructions

Answer

Correct Answer: 35 instructions

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146.
In 8051, the mode 2 timer is ____________.

a 13-bit timer

an 8-bit timer

a 16-bit timer

a 12-bit timer

Answer

Correct Answer: an 8-bit timer

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147.
When is the TFO flag raised for the following program?(Assume XTAL=11.0592 MHz)

MOV TMOD,#01
MOV TLO,#12H
MOV THO,#1CH
SETB TRO

After 65536 clock cycles

After 58350 clock cycles

After 18370 clock cycles

After 25550 clock cycles

Answer

Correct Answer: After 58350 clock cycles

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148.
How much delay would be there in the following program if the crystal frequency is 11.0592 MHz?

436.17

236.17

336.17

136.17

Answer

Correct Answer: 436.17

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149.

In the Dallas microcontroller DS5000T-8 ,"T" indicates__________.

a timer circuit

a T-type flip flop

a counter ckt

a real-time clock

Answer

Correct Answer: a real-time clock

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150.
Which mode and which timer are selected for the following instructions?

Mode 1 and timer 0

Mode 2 and timer 1

Mode 2 and timer 0

Mode 1 and timer 1

Answer

Correct Answer: Mode 2 and timer 1

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151.
What does the term "third-party support" mean?

Availability of software to support microcontrollers

Availability of dealers to market the product

Answer

Correct Answer: Availability of dealers to market the product
Availability of dealers to market the product

Note: This question has more than 1 correct answers

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152. For serial mode 2, SM0 and SM1 bits of the SCON (serial control) register must be ____________.

1 and 0

0 and 1

0 and 0

1 and 1

Answer

Correct Answer: 1 and 0

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153. Microcontrollers are generally designed by using the__________.

TTL technology

MOS technology

NMOS technology

CMOS technology

Answer

Correct Answer: CMOS technology

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154. Which micro controller must be selected for a faster response?

8-bit

13-bit

4-bit

16-bit

Answer

Correct Answer: 16-bit

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155. On which architecture is the Intel 8051 Micro Controller based?

VON Neumann

Harvard

Pascal

All of the above

Answer

Correct Answer: Harvard

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156. Which bits of the PSW register are User-definable in 8051?

PSW.0 & PSW.7

PSW.1 & PSW.5

PSW.2 & PSW.6

PSW.3 & PSW.4

Answer

Correct Answer: PSW.1 & PSW.5

Note: This Question is unanswered, help us to find answer for this one

157. Which of the following is not a special function register (SFR) in 8051?

ACC

PSW

DPTR

Answer

Correct Answer: PC

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158. When 67H in BCD is converted to ASCII, it becomes___________________.

30H and 31H

32H and 36H

36H and37H

37H and38H

Answer

Correct Answer: 36H and37H

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159. Which of the following micro controllers has a watchdog timer (WDT)?

ARM

8051

PIC

AVR

Answer

Correct Answer: AVR

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160. When is the TFI flag raised in Mode 1?

At FFFFH

At 1FFFI

At FFH

At 2FFH

Answer

Correct Answer: At FFFFH

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161. What would be the baud rate for the following, if XTAL=16MHz and SMOD =0?

MOV THI, #-10

9600

4800

4166

1200

Answer

Correct Answer: 4166

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162. What would be the status of CY and AC flags after the addition of 76 H and 8CH in the following instructions?

MOV A,#76H
ADD A,#8CH

CY=1 AND AC=1

CY=1 AND AC=O

CY=0 AND AC=0

CY=O AND AC = 1?

Answer

Correct Answer: CY=1 AND AC=O

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163. Which RAM location is used as the first location of the stack on power-up in 8051?

RAM location 06H

RAM location 02H

RAM location 08 H

RAM location 00H

Answer

Correct Answer: RAM location 08 H

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Basic Embedded Systems MCQ

1. Linux normally requires at least a __ CPU containing a memory management unit (MMU)

2. Which statements are correct about Small Scale Embedded Systems?

3. The ITM trace packages for read/write accesses contain the following information: (choose all that apply)

4. _____ trace macrocells generate trace information for hardware trigger (system event tracing) or provide diagnostic information produced by code instrumentation of the application software.

5. Which statements are True about Sophisticated Scale Embedded Systems?

6. Using a TRACE32, which generated code can be loaded into the control hardware and functionally tested in-situ?

7. Choose the best statement to describe the role of a watchdog timer?

8. Choose the statement that best describes sharing code like counters between interrupt and non-interrupt code?

9. Which communication interface is/are required for an Embedded System to interact with external world peripheral/systems?

10. What is ARM?

11. Which statement is incorrect about Digital Signal Processor?

12. Choose the best description of "pivot_root" in Embedded System programming?

13. The Multi Core Debug System (MCDS) on the emulation devices provides a counter and trigger systems which extend the normal ___ debug resources.

14. Which are select features of the TRACE32 CoreSight tool?

15. If you are developing C code for an early model ARM Cortex processor, your program fails to compile. However if you remove the below statement from the code, it starts working. What is the reason for the compile error?t = t + 0.01

16. A manufacturer builds a ____ ‘family’ around a fixed microprocessor core. Different family members are created by using the same core, including with it different combinations of peripherals and different memory sizes.

17. The Field programmable Gate Arrays (FPGAs) can be used to implement ______________.

18. How would -34H be represented as a signed number in 2s complement in 8051?

19. ARM3 was produced with __________.

20. What number should be loaded into the TH register using mode 2 to get 100μsec delay? (Assume XTAL=11.0592MHz)

21. The Atmega 16 micro controller is a __________.

22. How many times is the following loop performed? MOV R6, #200BACK: MOV R5, #100HERE: DJNZ R5, HERE DJNZ R6, BACK

23. Which devices are used in Embedded Systems?

24. Which one of the following files is produced by an 8051 assembler?

25. If the conditions are: PA= output with handshaking PB=output with handshaking, unused bit of PC=don't careWhat would be the control word for 8255 PPI?

26. Which timer of 8051 is used to set the baud rate?

27. The PIC 16F84 micro controller is __________.

28. What exactly is Moore's Law about?

29. The major difference between Intel 8051 microcontroller and Intel 8031 microcontroller is that the 8031_________.

30. The LJMP (long jump) instruction is a ____________________.

31. What value must R4 have in the following instruction in order not to jump CJNE R4, #53, OVER?

32. Which of the following companies has designed the AVRs micro controllers?

33. With which memory are RAS and CAS associated?

34. The DS5000 microcontroller is called a home development system because it has a___________.

35. Which version of 8051 is the 8751 microcontroller?

36. Which one of the following is not correct?

37. Which instruction is used to correct the BCD addition problem in 8051?

38. In 8051,the upper limit of the Timer is__________.

39. The JTAG (Joint Test Action Group)is the usual name used for _________________.

40. What value should be loaded into THI to have a 9600 baud rate, if XTAL=11.0952MHz?

41. The ARM architecture is a ___________.

42. The bit addressable memory is present in ____________.

43. In the ATMEL corporation's microcontroller AT89C51, 'C' in the part number indicates__________.

44. After reset in 8051, the ports P0-P3 are initialised to __________________.

45. Which bit of the IP register belongs to the serial Interrupt Priority in 8051?

46. Which register bank conflicts with stack in 8051?

47. What would be the control word for 8255 PPI if all ports are input ports?

48. At which ROM location do we store the first Op-code of an 8051 program?

49. What would be the baud rate if TH1= -2, SMOD = 1and XTAL=11.0592MHz in 8051?

50. The flash memory stores information in an array of __________________.

51. What would be the contents of register A after the following code is executed?MOV A,#56HSWAP ARR ARR A

52. When 8051 is powered up, the SP register contains the value of ____________.

53. What would be the contents of register A after the execution of the following code?CLR AORL A, #99HCPL A

54. Which register bank will be selected if bits 3 and 4 of PSW are 1 & 0 in 8051?

55. What frequency is used by the timer to set the baud rate, if XTAL=11.0592MHz?

56. Which of the following is not correct?

57. The program counter of the PIC16F84 micro controller is of__________.

58. Which of the following has the SMOD bit?

59. Which interrupt will get the highest priority after resetting the system if the interrupt priority is set by the instruction "MOV IP, OCH"?

60. How many bytes are used by DATA_2 DB"ENGLAND"?

61. What would be in register A after the execution of the following code?MOV A, #85HSWAP AANL A, #OFOH

62. Which of the following cannot be a sequence in the normal 4-step sequence for a Stepper Motor?

63. Which addressing mode is used by the instruction "Mov A,30 H"?

64. Which of the following signs is used with the Register Indirect Addressing Mode?

65. Which of the following registers of 8051 is not Bit- Addressable?

66. The status of the OV flag for (-2) + (-5) will be_____________.

67. Which of the following classification types are correct of Embedded Systems based on performance and functional requirements?

68. Which statement is True about TLM?

69. Which of the following statements is/are True for Microcontrollers?

70. The TRACE32 software is an open design so that it works smoothly with all of the common basic components of an ____ design.

71. Which programming language is the Mid-level programming counterpart for Assembly programming?

72. Which are the designs constraints of Embedded system for Real-Time control system?

73. Based on performance and functional requirements, Embedded systems are classified as:

74. What are the following essential units of a processor on an Embedded System?

75. What are the Statistical Moments in Embedded Systems?

76. Which events does AOS provide synchronization and communication with in API?

77. What statements correct regarding Dynamic Memory Allocation in RTOS?

78. Functionalities are done by dedicated HW and SW with _____ resources.

79. C Models abstraction level set is applied to simulation of _____

15.
If you are developing C code for an early model ARM Cortex processor, your program fails to compile. However if you remove the below statement from the code, it starts working. What is the reason for the compile error?
t = t + 0.01

22.
How many times is the following loop performed?
MOV R6, #200
BACK: MOV R5, #100
HERE: DJNZ R5, HERE
DJNZ R6, BACK

25.
If the conditions are:
PA= output with handshaking
PB=output with handshaking, unused bit of PC=don't care
What would be the control word for 8255 PPI?

51.
What would be the contents of register A after the following code is executed?
MOV A,#56H
SWAP A
RR A
RR A

53.
What would be the contents of register A after the execution of the following code?

CLR A
ORL A, #99H
CPL A

61.
What would be in register A after the execution of the following code?

MOV A, #85H
SWAP A
ANL A, #OFOH

120.
What are the Statistical Moments? (check all that apply)

121.
Which of the following are Classification of Embedded Systems?

122.
Design interface definitions with the following levels of abstraction are used?

123.
Which of the following statement is incorrect about Digital Signal Processor?

124.
Many embedded devices use analog- to-digital-converters (ADCs) for data acquisition. These ADCs may be sampled on a regular timed basis, and the data samples stored by application software in an?

125.
Which of the following is Classifications of Embedded Systems?

126.
Different addressing modes in 8051 microcontroller are?

127.
The processor _____ must have a trace port with sufcient bandwidth so that the trace information can be recorded by an external tool without any information loss?

128.
UART allows Microcontroller to communicate with? (check all that apply)

129.
The baseline PIC microcontroller family represents the most direct descendant of the General Instruments ancestors, and displays the core features of the original PIC design. The first Microchip baseline microcontrollers were coded?

130.
Which of the following TRACE32 CoreSight Features?

131.
Select a True statements for Microcontroller ? (check all that apply)

132.
Embedding a real μC into simulation environments can be implemented in following different ways, choose correct statements? (check all that apply)

133.
Select True statements for Microprocessor?

134.
FPGA based emulators map the SoC design to the configurable logic blocks of an FPGA. FPGAs are a flexible solution as long as the complete design can be mapped to one FPGA?

135.
The ITM trace packages for read/write accesses contain the following information?

136.
The Multi Core Debug System (MCDS) on the emulation devices provides a counter and trigger systems which extends the normal ___ debug resources?

137.
Using a TRACE32, the generated code was loaded into the control hardware and functionally tested in-situ?

138.
On reset, What happens in an embedded system?

140.
Choose the most probable reason for the compile error. If you are developing code for an early model ARM Cortex processor, your code fails to build and when you remove the line below the code compiles successfully? t = t + 0.01

141.
To record the trace information generated by the Cortex-M3/M4 processors, Lauterbach supports following modes? (check all that apply)

142.
The SCE-MI provides a transport infrastructure between the _____ and the host workstation sides of each channel which interconnects transactor models in the emulator to C (untimed or RTL) models on the workstation?

143.
General purpose processor consists of? (check all that apply)

144.
UART is best described as?

145.
The Instruction set of the PIC I6CXX micro controller family has __________.

146.
In 8051, the mode 2 timer is ____________.

147.
When is the TFO flag raised for the following program?(Assume XTAL=11.0592 MHz)

MOV TMOD,#01
MOV TLO,#12H
MOV THO,#1CH
SETB TRO

148.
How much delay would be there in the following program if the crystal frequency is 11.0592 MHz?

149.

In the Dallas microcontroller DS5000T-8 ,"T" indicates__________.