General Embedded Systems MCQs

1. Which RAM location is used as the first location of the stack on power-up in 8051?

2. What would be the status of CY and AC flags after the addition of 76 H and 8CH in the following instructions? MOV A,#76H ADD A,#8CH

3. What would be the baud rate for the following, if XTAL=16MHz and SMOD =0? MOV THI, #-10

4. When is the TFI flag raised in Mode 1?

5. Which of the following micro controllers has a watchdog timer (WDT)?

6. When 67H in BCD is converted to ASCII, it becomes___________________.

7. Which of the following is not a special function register (SFR) in 8051?

8. Which bits of the PSW register are User-definable in 8051?

9. On which architecture is the Intel 8051 Micro Controller based?

10. Which micro controller must be selected for a faster response?

11. Microcontrollers are generally designed by using the__________.

12. For serial mode 2, SM0 and SM1 bits of the SCON (serial control) register must be ____________.

13. What does the term third-party support mean?

14. Which mode and which timer are selected for the following instructions?

15. In the Dallas microcontroller DS5000T-8 , T indicates__________.

16. How much delay would be there in the following program if the crystal frequency is 11.0592 MHz?

17. When is the TFO flag raised for the following program?(Assume XTAL=11.0592 MHz) MOV TMOD,#01 MOV TLO,#12H MOV THO,#1CH SETB TRO

18. In 8051, the mode 2 timer is ____________.

19. The Instruction set of the PIC I6CXX micro controller family has __________.

20. UART is best described as?

21. General purpose processor consists of? (check all that apply)

22. The SCE-MI provides a transport infrastructure between the _____ and the host workstation sides of each channel which interconnects transactor models in the emulator to C (untimed or RTL) models on the workstation?

23. To record the trace information generated by the Cortex-M3/M4 processors, Lauterbach supports following modes? (check all that apply)

24. Choose the most probable reason for the compile error. If you are developing code for an early model ARM Cortex processor, your code fails to build and when you remove the line below the code compiles successfully? t = t + 0.01

25. The complete data exchange between the simulation and the μC is realized via the standard debugger interface, so the hardware effort for the coupling is minimal in comparison to other HIL simulation approaches where every ____ pin itself has to be connected to the interface of the simulation computer?

26. On reset, What happens in an embedded system?

27. Using a TRACE32, the generated code was loaded into the control hardware and functionally tested in-situ?

28. The Multi Core Debug System (MCDS) on the emulation devices provides a counter and trigger systems which extends the normal ___ debug resources?

29. The ITM trace packages for read/write accesses contain the following information?

30. FPGA based emulators map the SoC design to the configurable logic blocks of an FPGA. FPGAs are a flexible solution as long as the complete design can be mapped to one FPGA?

31. Select True statements for Microprocessor?

32. Embedding a real μC into simulation environments can be implemented in following different ways, choose correct statements? (check all that apply)

33. Select a True statements for Microcontroller ? (check all that apply)

34. Which of the following TRACE32 CoreSight Features?

35. The baseline PIC microcontroller family represents the most direct descendant of the General Instruments ancestors, and displays the core features of the original PIC design. The first Microchip baseline microcontrollers were coded?

36. UART allows Microcontroller to communicate with? (check all that apply)

37. The processor _____ must have a trace port with sufcient bandwidth so that the trace information can be recorded by an external tool without any information loss?

38. Different addressing modes in 8051 microcontroller are?

39. Which of the following is Classifications of Embedded Systems?

40. Many embedded devices use analog- to-digital-converters (ADCs) for data acquisition. These ADCs may be sampled on a regular timed basis, and the data samples stored by application software in an?

41. Which of the following statement is incorrect about Digital Signal Processor?

42. Design interface definitions with the following levels of abstraction are used?

43. Which of the following are Classification of Embedded Systems?

44. What are the Statistical Moments? (check all that apply)

45. What is the difference between a microprocessor and microcontroller? (choose all that apply)

46. When porting the AOS, CAL has the following calls when rewritten?

47. Which statement is incorrect about Medium Scale Embedded Systems?

48. Embedded software has the following components?

49. The 16 Series instruction set has which of the following arithmetic instructions?

50. What is the difference between binary semaphore and mutex?

51. A SoC is Embedded with the following components?

52. A Microcontroller contains a processor, memory, and programmable I/O peripherals is generally ____ on a chip.

53. Under Cross-Platform development environment, the target embedded system generally offers:

54. What are the system level requirements for Embedded Systems?

55. What are the Classification types of Actuators?

56. What are the functional requirements of Embedded System?

57. Which of the following factors cause security risks in software:

58. Which of the following is the correct flow for Data Acquisition System?

59. What are the different Addressing Modes in 8051 microcontroller? (Check multiple if apply)

60. What are the interrupts aspects in RESET 8051?

61. Which architecture is most compatible with Beagle Board hardware?

62. Choose the best description of ‘chroot’ as used for embedded system programming?

63. Select the True statement for Microcontroller disadvantages.

64. Which statement is correct for advantages in Microcontroller?

65. Choose the correct statement for ARM and AVR Architecture.

66. A developer can issue commands to debug a running application, including the following activities?

67. Developing software for real-time Embedded Systems involves many activities including the following:

68. Which methods are used in event counting?

69. Lauterbach system tool support which modes while recording the trace information generated by the Cortex-M3/M4 processors?

70. In Linux, the bootloader performs _____ initialization.

71. Which statements describe the difference between a timer and a counter?

72. The trace information can be recorded by an external tool without any information loss using trace port in __

73. Separating Embedded System functionality into RTOS tasks can serve the following aspects?

74. What methods can you use when reading the values of timer?

75. What are the advantages of 'cmake' for cross-compiling to Embedded Systems?

76. Arduino development boards are based on which family of Microcontroller?

77. What are aspects of the Hardware Architecture Model?

78. IO Subsystems in RTOS generally work in __ IO Operations.

79. The main components within a computer or embedded processing engine include the following:

80. Microcontrollers are a combination of _____ and Memory and other peripherals like RAM, ROM, buffer, I/O ports

81. Creating embedded systems requires an iterative process of modeling, ____ , and analysis?

82. A run-time counter tracks the ____ slice for each task, incrementing on every clock tick.

83. The amount of trace data that is _____ via the trace port depends on the target system hardware. The number of cores, the number of trace port pins, and the trace clock speed are all important parameters.

84. What are dependability requirements of an Embedded System? (choose all that apply)

85. C Models abstraction level set is applied to simulation of _____

86. Functionalities are done by dedicated HW and SW with _____ resources.

87. What statements correct regarding Dynamic Memory Allocation in RTOS?

88. Which events does AOS provide synchronization and communication with in API?

89. What are the Statistical Moments in Embedded Systems?

90. What are the following essential units of a processor on an Embedded System?

91. Based on performance and functional requirements, Embedded systems are classified as:

92. Which are the designs constraints of Embedded system for Real-Time control system?

93. Which programming language is the Mid-level programming counterpart for Assembly programming?

94. The TRACE32 software is an open design so that it works smoothly with all of the common basic components of an ____ design.

95. Which of the following statements is/are True for Microcontrollers?

96. Which statement is True about TLM?

97. Which of the following classification types are correct of Embedded Systems based on performance and functional requirements?

98. The status of the OV flag for (-2) + (-5) will be_____________.

99. Which of the following registers of 8051 is not Bit- Addressable?

100. A watchdog timer circuit is basically a____________________.

101. Which of the following signs is used with the Register Indirect Addressing Mode?

102. Which addressing mode is used by the instruction 'Mov A,30 H'?

103. Which of the following cannot be a sequence in the normal 4-step sequence for a Stepper Motor?

104. What would be in register A after the execution of the following code? MOV A, #85H SWAP A ANL A, #OFOH

105. How many bytes are used by DATA_2 DB'ENGLAND'?

106. Which interrupt will get the highest priority after resetting the system if the interrupt priority is set by the instruction 'MOV IP, OCH'?

107. Which of the following has the SMOD bit?

108. The program counter of the PIC16F84 micro controller is of__________.

109. Which of the following is not correct?

110. What frequency is used by the timer to set the baud rate, if XTAL=11.0592MHz?

111. Which register bank will be selected if bits 3 and 4 of PSW are 1 & 0 in 8051?

112. What would be the contents of register A after the execution of the following code? CLR A ORL A, #99H CPL A

113. When 8051 is powered up, the SP register contains the value of ____________.

114. What would be the contents of register A after the following code is executed? MOV A,#56H SWAP A RR A RR A

115. The flash memory stores information in an array of __________________.

116. What would be the baud rate if TH1= -2, SMOD = 1and XTAL=11.0592MHz in 8051?

117. At which ROM location do we store the first Op-code of an 8051 program?

118. What would be the control word for 8255 PPI if all ports are input ports?

119. Which register bank conflicts with stack in 8051?

120. Which bit of the IP register belongs to the serial Interrupt Priority in 8051?

121. After reset in 8051, the ports P0-P3 are initialised to __________________.

122. In the ATMEL corporation's microcontroller AT89C51, 'C' in the part number indicates__________.

123. The bit addressable memory is present in ____________.

124. The ARM architecture is a ___________.

125. What value should be loaded into THI to have a 9600 baud rate, if XTAL=11.0952MHz?

126. The JTAG (Joint Test Action Group)is the usual name used for _________________.

127. In 8051,the upper limit of the Timer is__________.

128. Which instruction is used to correct the BCD addition problem in 8051?

129. Which one of the following is not correct?

130. Which version of 8051 is the 8751 microcontroller?

131. The DS5000 microcontroller is called a home development system because it has a___________.

132. With which memory are RAS and CAS associated?

133. Which of the following companies has designed the AVRs micro controllers?

134. What value must R4 have in the following instruction in order not to jump CJNE R4, #53, OVER?

135. The LJMP (long jump) instruction is a ____________________.

136. The major difference between Intel 8051 microcontroller and Intel 8031 microcontroller is that the 8031_________.

137. What exactly is Moore's Law about?

138. The PIC 16F84 micro controller is __________.

139. Which timer of 8051 is used to set the baud rate?

140. If the conditions are: PA= output with handshaking PB=output with handshaking, unused bit of PC=don't care What would be the control word for 8255 PPI?

141. The speed of the semiconductor memory is in the range of ___________.

142. Which one of the following files is produced by an 8051 assembler?

143. Which devices are used in Embedded Systems?

144. How many times is the following loop performed? MOV R6, #200 BACK: MOV R5, #100 HERE: DJNZ R5, HERE DJNZ R6, BACK

145. The Atmega 16 micro controller is a __________.

146. What number should be loaded into the TH register using mode 2 to get 100μsec delay? (Assume XTAL=11.0592MHz)

147. ARM3 was produced with __________.

148. How would -34H be represented as a signed number in 2s complement in 8051?

149. The Field programmable Gate Arrays (FPGAs) can be used to implement ______________.

150. A manufacturer builds a ____ ‘family’ around a fixed microprocessor core. Different family members are created by using the same core, including with it different combinations of peripherals and different memory sizes.

151. If you are developing C code for an early model ARM Cortex processor, your program fails to compile. However if you remove the below statement from the code, it starts working. What is the reason for the compile error? t = t + 0.01

152. Which are select features of the TRACE32 CoreSight tool?

153. The Multi Core Debug System (MCDS) on the emulation devices provides a counter and trigger systems which extend the normal ___ debug resources.

154. Choose the best description of ‘pivot_root’ in Embedded System programming?

155. Which statement is incorrect about Digital Signal Processor?

156. What is ARM?

157. Which communication interface is/are required for an Embedded System to interact with external world peripheral/systems?

158. Choose the statement that best describes sharing code like counters between interrupt and non-interrupt code?

159. An ASSP is not used as an additional ____ unit for running the application in place of using embedded software.

160. Choose the best statement to describe the role of a watchdog timer?

161. Using a TRACE32, which generated code can be loaded into the control hardware and functionally tested in-situ?

162. Which statements are True about Sophisticated Scale Embedded Systems?

163. _____ trace macrocells generate trace information for hardware trigger (system event tracing) or provide diagnostic information produced by code instrumentation of the application software.

164. The ITM trace packages for read/write accesses contain the following information: (choose all that apply)

165. Which statements are correct about Small Scale Embedded Systems?

166. Which statement is incorrect for Multiprocessor System using GPPs?

167. Linux normally requires at least a __ CPU containing a memory management unit (MMU)