1. For a 12-bit ADC, the range of input-voltage is (0 to +10v).The voltage corresponding to LSB is _____.

2. The address bus width of a memory of size (1024*8) bit is _____.

3. A circuit has an output that is determined by the present input as well as the previous output states. The circuit is known as _____.

4. To read the RMS value of which of the following waveforms are true RMS reading voltmeters used?

5. Triggering action can be obtained in a J-K F/F by __________ .

6. The addition of hexadecimal number DF16 + AC16

7. Which family has the fastest speed?

8. A semi-conductor ROM is basically a ________.

9. Race condition occurs in _____.

10. LSI and VLSI devices use the _____ technology.

11. If an ADC with 8-bit output gives full-scale deflection for 12v analog-signal, its resolution is _____.

12. In sequential circuits, memory elements are _____.

13. A twisted ring counter consisting of 6 F/F will have

14. The number of 4-line-to-16-line decoders required to make an 8-line-to-250-line decoder is_____ .

15. In an XNOR gate, input A is high and B is low. The output will _____.

16. One of the two states of a circuit is stable and the others are quasi-stable. The circuit is a _____ circuit.

17. If inverters are added to the inputs of AND gate, the logic function is _____.

18. In a karnaugh map, a quad eliminates _____ variables.

19. In a shift register, complemented output point Ā of the last flip-flop is joined to point J of the first flip-flop while its point K is joined to point A of the last flip-flop. The circuit will work as _____.

20. A monostable circuit gives a pulse-width output having tp=0.3 Rx.Cx. The device employed is likely to be_____ .

21. 9's complement of 56 is _____.

22. A triggerable one-shot monostable MVR _____.

23. The time taken by an ADC to perform a conversion is usually referred to as

24. A 4-bit synchronous counter uses flip-flops with the propagation delay time of 25nsec each. The maximum possible time required for the change of state will be _____.

25. The write-cycle time of a memory is 200 nsec. The maximum rate at which data can be stored is________

26. A multiplexer having 32 data input lines needs _____ select lines.

27. Which of the following memories uses an index-hole to provide timing signals?

28. Shift-registers most commonly use _____.

29. A monostable circuit uses a timing register of 10k ohms and a capacitor of 0.1µF capacity respectively. Its pulse-width will be approximately_____ .

30. Pocket calculators use the_________ system.

31. The minimum number of resistors required in a 4-bit network of weighted resistor type DAC is ______.

32. In the floating point system, the exponent is written in __________ notation.

33. The race-around condition occurs in J-K F/F when____________ .

34. The most important advantage of CMOS is its _____.

35. In the BCD number system, subtraction is done by the______ method.

36. In a microprocessor, the adder circuit is a part of

37. The counting sequence of a uniform counter is 000,001,011,111,110,100.The counter is a _____.

38. The comparison time of ADC-0800 is in the range of _____.

39. How many memory locations can 14 address bits access?

40. A universal register _____.

41. In an IC-555-timer, the load can be connected _____.

42. Decimal counters using flip flops and feedback are more popular than a decimal counter of ring counter type because of _____.

43. Adding inverters to the input of an OR gate produces the _____ logic function.

44. Semi-conductor memories are widely used because of their__________ .

45. A J-K F/F may be obtained by adding__________

46. A memory in which the contents get erased when power-failure occurs is called_______ .

47. For a flip-flop with provisions of preset and clear__________.

48. One OR gate can work as a _____ comparator

49. In a 4-bit weighted-register DAC, the resistor value corresponding to MSB is 2k ohm. The resistor value corresponding to LSB will be _____.

50. A transparent latch consists of a__________ .

51. The address bus width of a memory of size (1024*8) bit is __b___.

52. A multiplexer tree is needed when the number of inputs is more than _____.

53. When a large number of analog-signals are to be converted to the digital form, the most suitable ADC is _________ converter.

54. If in a clocked R-S Flip Flop, point R is joined to point S through an inverter, the circuit will become a_______

55. A flip-flop may be built with

56. Hexadecimal equivalent of (268)10 is_______ .

57. The design of a sequential circuit requires the use of _____.

58. The outputs Q and ¯Q of a master-slave S-R F/F are connected to its S and R inputs respectively. Its output Q, when clock pulses are applied, will be__________.

59. Shifting the contents of a shift register one place to the left is equivalent to

60. Two mod-3 counters are cascaded. The circuit will behave as a _____.

61. While designing a counter circuit, the preferred type of flip-flop is _____.

62. A 1 us pulse can be converted into a 1 ms pulse by using a _____ multivibrator(MVR).

63. What would be the value of X if (110001)2= X10?

64. The most suitable gate for comparing two bits is the _____ gate.

65. The boolean expression XY+X+XY is equal to _____.

66. A half adder consists of an _____ gate and a _____ gate.

67. A memory device that contains a SRAM and EEPROM in the same chip is called _____.

68. In BCD to 7 segment decoder/driver, the input is 1000. The segments which will be lit are _____.

69. The boolean expression xy + xz +xyz ( xy + z ) is equal to _____.

70. A PLA consists of

71. A retail site should track conversions by setting up a(n) _____ goal in analytics.

72. In a files's inode, the first 10 pointers are called ____ pointers.