MCQs > Electronics & Appliances > VLSI - Very Large Scale Integration > Which condition qualifies for a Latch-up in CMOS circuit condition?

VLSI - Very Large Scale Integration MCQs

Which among the following conditions qualifies for a Latch-up in CMOS circuit condition?

Answer

Correct Answer: When a low resistance path is established between the drain and the source

Explanation:

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Your Skill Level: Poor

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